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IEEE White Paper : IEEE P3164 Asset Identification:2024
Asset Identification for Electronic Design IP
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The Accellera Security Annotation for Electronic Design Integration (SA-EDI) standard provides a framework for producing security assurance collateral for an IP. The root of the standard and its workflow is the identification of assets for a given IP. Once the assets are identified, the corresponding threats and attack surfaces can be determined to help an Integrator address risks in their integrated circuits (ICs). Therefore, if an asset was mistakenly identified, either a false positive or a false negative, the rest of the collateral would become invalid. Unfortunately, the standard provides little guidance on identifying assets and avoiding false positives/negatives. This paper proposes two methodologies for asset identification within an IP using conceptual and structural analysis (CSA) and points of influence and observation (PIO).
The Accellera Security Annotation for Electronic Design Integration (SA-EDI) standard provides a framework for producing security assurance collateral for an IP. The root of the standard and its workflow is the identification of assets for a given IP. Once the assets are identified, the corresponding threats and attack surfaces can be determined to help an Integrator address risks in their integrated circuits (ICs). Therefore, if an asset was mistakenly identified, either a false positive or a false negative, the rest of the collateral would become invalid. Unfortunately, the standard provides little guidance on identifying assets and avoiding false positives/negatives. This paper proposes two methodologies for asset identification within an IP using conceptual and structural analysis (CSA) and points of influence and observation (PIO).
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Technical characteristics
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Publication Date | 04/05/2024 |
| Cancellation Date | 04/05/2024 |
| Page Count | 26 |
| EAN | --- |
| ISBN | --- |
| Weight (in grams) | --- |
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