GET https://dev.normadoc.fr/_partial/product/IEEE00002372/features

Components

4 Twig Components
8 Render Count
11 ms Render Time
250.0 MiB Memory Usage

Components

Name Metadata Render Count Render Time
ProductState
"App\Twig\Components\ProductState"
components/ProductState.html.twig
3 0.76ms
ProductMostRecent
"App\Twig\Components\ProductMostRecent"
components/ProductMostRecent.html.twig
3 2.25ms
ProductType
"App\Twig\Components\ProductType"
components/ProductType.html.twig
1 0.24ms
ProductCard
"App\Twig\Components\ProductCard"
components/ProductCard.html.twig
1 8.25ms

Render calls

ProductState App\Twig\Components\ProductState 250.0 MiB 0.39 ms
Input props
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          New IEEE Standard - Inactive-Withdrawn.<br />\n
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          \t\t\t\t<br />\n
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Component
App\Twig\Components\ProductState {#95002
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          New IEEE Standard - Inactive-Withdrawn.<br />\n
          The operation, functions, and attributes of a parallel system bus (PSB), called MULTIBUS II, are defined. A high-performance backplane bus intended for use in multiple processor systems, the PSB incorporates synchronous, 32-bit multiplexed address/data, with error detection, and uses a 10 MHz bus clock. This design is intended to provide reliable state-of-the-art operation and to allow the implementation of cost-effective, high-performance VLSI for the bus interface. Memory, I/O, message, and geographic address spaces are defined. Error detection and retry are provided for messages. The message-passing design allows a VLSI implementation, so that virtually all modules on the bus will utilize the bus at its highest performance—32 to 40 Mbyte/s. An overview of PSB, signal descriptions, the PSB protocol, electrical characteristics, and mechanical specifications are covered.<br />\n
          \t\t\t\t<br />\n
          This International Standard defines the operation, functions, and attributes of the IEEE 1296 bus standard. This standard defines a high-performance 32-bit synchronous bus standard.The bus standard must have a design-in lifetime of 10 years with backward compatibility.The standard is intended for general purpose applications to optimize block transfers, including protocol for message passing. For real-time applications, the bus will provide a means of ensuring an upper limit to message delivery time.The standard is intended to be compatible with existing IEC mechanical standards (IEC Pub 297-1, 297-3, and 603-2) with recognition of the need for special front panels to address ESD, EMI, and RFI requirements.Options within the standard will be clearly identified.The standard is intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system.The standard is intended to support heterogeneous processor types in the same system.Message-passing format and protocol is intended for future migration to a serial system bus.
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ProductType App\Twig\Components\ProductType 250.0 MiB 0.24 ms
Input props
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ProductMostRecent App\Twig\Components\ProductMostRecent 250.0 MiB 0.89 ms
Input props
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          New IEEE Standard - Inactive-Withdrawn.<br />\n
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          New IEEE Standard - Inactive-Withdrawn.<br />\n
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    -lastUpdatedAt: DateTime @1578006000 {#7496
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    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
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  }
  +label: "Most Recent"
  +icon: "check-xs"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}
ProductState App\Twig\Components\ProductState 250.0 MiB 0.16 ms
Input props
[
  "product" => App\Entity\Product\Product {#7520
    #id: 9458
    #code: "IEEE00002372"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038280 {#7536
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    }
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    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 32841
        #name: "IEEE/ISO/IEC 10861:1994"
        #slug: "ieee-iso-iec-10861-1994-ieee00002372-241110"
        #description: """
          New IEEE Standard - Inactive-Withdrawn.<br />\n
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          \t\t\t\t<br />\n
          This International Standard defines the operation, functions, and attributes of the IEEE 1296 bus standard. This standard defines a high-performance 32-bit synchronous bus standard.The bus standard must have a design-in lifetime of 10 years with backward compatibility.The standard is intended for general purpose applications to optimize block transfers, including protocol for message passing. For real-time applications, the bus will provide a means of ensuring an upper limit to message delivery time.The standard is intended to be compatible with existing IEC mechanical standards (IEC Pub 297-1, 297-3, and 603-2) with recognition of the need for special front panels to address ESD, EMI, and RFI requirements.Options within the standard will be clearly identified.The standard is intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system.The standard is intended to support heterogeneous processor types in the same system.Message-passing format and protocol is intended for future migration to a serial system bus.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "ISO/IEC International Standard for Information Technology- Microprocessor Systems- High-Performance Synchronous 32-Bit Bus: Multibus II"
        -notes: "Inactive-Withdrawn"
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    #currentTranslation: null
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    #images: Doctrine\ORM\PersistentCollection {#8118 …}
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    -apiLastModifiedAt: DateTime @1754517600 {#7530
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  "showFullLabel" => "true"
]
Attributes
[
  "showFullLabel" => "true"
]
Component
App\Twig\Components\ProductState {#102210
  +product: App\Entity\Product\Product {#7520
    #id: 9458
    #code: "IEEE00002372"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038280 {#7536
      date: 2025-06-27 17:31:20.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#7535
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 32841
        #name: "IEEE/ISO/IEC 10861:1994"
        #slug: "ieee-iso-iec-10861-1994-ieee00002372-241110"
        #description: """
          New IEEE Standard - Inactive-Withdrawn.<br />\n
          The operation, functions, and attributes of a parallel system bus (PSB), called MULTIBUS II, are defined. A high-performance backplane bus intended for use in multiple processor systems, the PSB incorporates synchronous, 32-bit multiplexed address/data, with error detection, and uses a 10 MHz bus clock. This design is intended to provide reliable state-of-the-art operation and to allow the implementation of cost-effective, high-performance VLSI for the bus interface. Memory, I/O, message, and geographic address spaces are defined. Error detection and retry are provided for messages. The message-passing design allows a VLSI implementation, so that virtually all modules on the bus will utilize the bus at its highest performance—32 to 40 Mbyte/s. An overview of PSB, signal descriptions, the PSB protocol, electrical characteristics, and mechanical specifications are covered.<br />\n
          \t\t\t\t<br />\n
          This International Standard defines the operation, functions, and attributes of the IEEE 1296 bus standard. This standard defines a high-performance 32-bit synchronous bus standard.The bus standard must have a design-in lifetime of 10 years with backward compatibility.The standard is intended for general purpose applications to optimize block transfers, including protocol for message passing. For real-time applications, the bus will provide a means of ensuring an upper limit to message delivery time.The standard is intended to be compatible with existing IEC mechanical standards (IEC Pub 297-1, 297-3, and 603-2) with recognition of the need for special front panels to address ESD, EMI, and RFI requirements.Options within the standard will be clearly identified.The standard is intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system.The standard is intended to support heterogeneous processor types in the same system.Message-passing format and protocol is intended for future migration to a serial system bus.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "ISO/IEC International Standard for Information Technology- Microprocessor Systems- High-Performance Synchronous 32-Bit Bus: Multibus II"
        -notes: "Inactive-Withdrawn"
      }
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    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
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    -author: ""
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    -bookCollection: ""
    -pageCount: 140
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  +appearance: "state-withdrawn"
  +labels: [
    "Withdrawn"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}
ProductMostRecent App\Twig\Components\ProductMostRecent 250.0 MiB 0.68 ms
Input props
[
  "product" => App\Entity\Product\Product {#7520
    #id: 9458
    #code: "IEEE00002372"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038280 {#7536
      date: 2025-06-27 17:31:20.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#7535
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 32841
        #name: "IEEE/ISO/IEC 10861:1994"
        #slug: "ieee-iso-iec-10861-1994-ieee00002372-241110"
        #description: """
          New IEEE Standard - Inactive-Withdrawn.<br />\n
          The operation, functions, and attributes of a parallel system bus (PSB), called MULTIBUS II, are defined. A high-performance backplane bus intended for use in multiple processor systems, the PSB incorporates synchronous, 32-bit multiplexed address/data, with error detection, and uses a 10 MHz bus clock. This design is intended to provide reliable state-of-the-art operation and to allow the implementation of cost-effective, high-performance VLSI for the bus interface. Memory, I/O, message, and geographic address spaces are defined. Error detection and retry are provided for messages. The message-passing design allows a VLSI implementation, so that virtually all modules on the bus will utilize the bus at its highest performance—32 to 40 Mbyte/s. An overview of PSB, signal descriptions, the PSB protocol, electrical characteristics, and mechanical specifications are covered.<br />\n
          \t\t\t\t<br />\n
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          """
        #metaKeywords: null
        #metaDescription: null
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    #currentTranslation: null
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      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
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Attributes
[]
Component
App\Twig\Components\ProductMostRecent {#102294
  +product: App\Entity\Product\Product {#7520
    #id: 9458
    #code: "IEEE00002372"
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    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
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    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038280 {#7536
      date: 2025-06-27 17:31:20.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#7535
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 32841
        #name: "IEEE/ISO/IEC 10861:1994"
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        #description: """
          New IEEE Standard - Inactive-Withdrawn.<br />\n
          The operation, functions, and attributes of a parallel system bus (PSB), called MULTIBUS II, are defined. A high-performance backplane bus intended for use in multiple processor systems, the PSB incorporates synchronous, 32-bit multiplexed address/data, with error detection, and uses a 10 MHz bus clock. This design is intended to provide reliable state-of-the-art operation and to allow the implementation of cost-effective, high-performance VLSI for the bus interface. Memory, I/O, message, and geographic address spaces are defined. Error detection and retry are provided for messages. The message-passing design allows a VLSI implementation, so that virtually all modules on the bus will utilize the bus at its highest performance—32 to 40 Mbyte/s. An overview of PSB, signal descriptions, the PSB protocol, electrical characteristics, and mechanical specifications are covered.<br />\n
          \t\t\t\t<br />\n
          This International Standard defines the operation, functions, and attributes of the IEEE 1296 bus standard. This standard defines a high-performance 32-bit synchronous bus standard.The bus standard must have a design-in lifetime of 10 years with backward compatibility.The standard is intended for general purpose applications to optimize block transfers, including protocol for message passing. For real-time applications, the bus will provide a means of ensuring an upper limit to message delivery time.The standard is intended to be compatible with existing IEC mechanical standards (IEC Pub 297-1, 297-3, and 603-2) with recognition of the need for special front panels to address ESD, EMI, and RFI requirements.Options within the standard will be clearly identified.The standard is intended to support multiple processor modules in a functionally partitioned configuration and heterogeneous processor types in the same system.The standard is intended to support heterogeneous processor types in the same system.Message-passing format and protocol is intended for future migration to a serial system bus.
          """
        #metaKeywords: null
        #metaDescription: null
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        -notes: "Inactive-Withdrawn"
      }
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    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
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    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
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    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  +label: "Most Recent"
  +icon: "check-xs"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}
ProductCard App\Twig\Components\ProductCard 250.0 MiB 8.25 ms
Input props
[
  "product" => App\Entity\Product\Product {#123700
    #id: 9109
    #code: "IEEE00001643"
    #attributes: Doctrine\ORM\PersistentCollection {#123683 …}
    #variants: Doctrine\ORM\PersistentCollection {#123681 …}
    #options: Doctrine\ORM\PersistentCollection {#123676 …}
    #associations: Doctrine\ORM\PersistentCollection {#123678 …}
    #createdAt: DateTime @1751037978 {#123673
      date: 2025-06-27 17:26:18.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#123666
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#123694 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#123794
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#123700}
        #id: 31445
        #name: "IEEE 1101:1987"
        #slug: "ieee-1101-1987-ieee00001643-240761"
        #description: """
          New IEEE Standard - Inactive-Withdrawn.<br />\n
          The standard covers three areas: the basic dimensions of subracks, this range of modular subracks conforming to IEC 297-3-1984, for mounting in equipment according to IEC 297-1-1986, and ANSI/EIA RS-310, together with the basic dimensions of a compatible range of plug-in units, printed boards, and backplanes; the dimensions of plug-in units and connectors, this standard gives the dimensions of associated plug-in units and connectors standardized by IEC 603-2-1980, together with applicable detail dimensions of the subrack; and the environmental requirements of subracks, this standard states environmental requirements of subracks and their associated plug-in units. The purpose of the standard is the specification of dimensions that will ensure the mechanical interchangeability and environmental requirements of subracks and of plug-in units.<br />\n
          \t\t\t\t<br />\n
          The purpose of this standard is the specification of dimensions that will ensure the mechanical interchangeability and environmental requirements of subracks and of plug-in units.
          """
        #metaKeywords: null
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        #shortDescription: "IEEE Standard for Mechanical Core Specifications for Microprocessors"
        -notes: "Inactive-Withdrawn"
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    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#123692 …}
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    -apiLastModifiedAt: DateTime @1754517600 {#123659
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    -lastUpdatedAt: DateTime @1578006000 {#123708
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
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    -author: ""
    -publishedAt: DateTime @578268000 {#123679
      date: 1988-04-29 00:00:00.0 Europe/Paris (+02:00)
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    -releasedAt: null
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  }
  "layout" => "vertical"
  "showPrice" => true
  "showStatusBadges" => true
  "additionalClasses" => "product__teaser--with-grey-border"
  "hasStretchedLink" => true
  "hoverType" => "shadow"
  "linkLabel" => "See more"
]
Attributes
[]
Component
App\Twig\Components\ProductCard {#123756
  +product: App\Entity\Product\Product {#123700
    #id: 9109
    #code: "IEEE00001643"
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    #variants: Doctrine\ORM\PersistentCollection {#123681 …}
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    #associations: Doctrine\ORM\PersistentCollection {#123678 …}
    #createdAt: DateTime @1751037978 {#123673
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    #enabled: true
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      "en_US" => App\Entity\Product\ProductTranslation {#123794
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#123700}
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          New IEEE Standard - Inactive-Withdrawn.<br />\n
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          \t\t\t\t<br />\n
          The purpose of this standard is the specification of dimensions that will ensure the mechanical interchangeability and environmental requirements of subracks and of plug-in units.
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        #metaKeywords: null
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        #shortDescription: "IEEE Standard for Mechanical Core Specifications for Microprocessors"
        -notes: "Inactive-Withdrawn"
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    #variantSelectionMethod: "match"
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    #reviews: Doctrine\ORM\PersistentCollection {#123689 …}
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    #images: Doctrine\ORM\PersistentCollection {#123687 …}
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    -documents: Doctrine\ORM\PersistentCollection {#123698 …}
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  +showPrice: true
  +showStatusBadges: true
  +additionalClasses: "product__teaser--with-grey-border"
  +linkLabel: "See more"
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ProductState App\Twig\Components\ProductState 250.0 MiB 0.21 ms
Input props
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Attributes
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Component
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  -stateAttributeCode: "state"
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ProductMostRecent App\Twig\Components\ProductMostRecent 250.0 MiB 0.67 ms
Input props
[
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Attributes
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Component
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}