Symfony Profiler

[
  "product" => App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#95049
  +product: App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  +appearance: "state-suspended"
  +labels: [
    "Superseded"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
]

App\Twig\Components\ProductType {#95229
  +product: App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  +label: "Standard"
  -typeAttributeCode: "type"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
]

App\Twig\Components\ProductMostRecent {#95304
  +product: App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  +label: "Historical"
  +icon: "historical"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#108760
  +product: App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
  +appearance: "state-suspended"
  +labels: [
    "Superseded"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
]

App\Twig\Components\ProductMostRecent {#108859
  +product: App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
  +label: "Historical"
  +icon: "historical"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#95745
    #id: 10851
    #code: "IEEE00005179"
    #attributes: Doctrine\ORM\PersistentCollection {#95727 …}
    #variants: Doctrine\ORM\PersistentCollection {#95724 …}
    #options: Doctrine\ORM\PersistentCollection {#95720 …}
    #associations: Doctrine\ORM\PersistentCollection {#95722 …}
    #createdAt: DateTime @1751039323 {#95753
      date: 2025-06-27 17:48:43.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754608190 {#95732
      date: 2025-08-08 01:09:50.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#95738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#95773
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#95745}
        #id: 38413
        #name: "IEEE 1076:2019"
        #slug: "ieee-1076-2019-ieee00005179-242503"
        #description: """
          Revision Standard - Active.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          This standard defines the syntax and semantics of the VHSIC Hardware Description Language (VHDL). The acronym VHSIC (Very High Speed Integrated Circuits) in the language’s name comes from the U.S. government program that funded early work on the standard.<br />\n
          VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Since it is both machine and human readable, it supports the design, development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. This document is intended for the implementers of tools supporting the language and for advanced users of the language.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard for VHDL Language Reference Manual"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#95736 …}
    #channels: Doctrine\ORM\PersistentCollection {#95729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#95734 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#95731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#95746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#95716
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1636326000 {#95752
      date: 2021-11-08 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1577055600 {#95751
      date: 2019-12-23 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 673
    -documents: Doctrine\ORM\PersistentCollection {#95742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#95740 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#115638
  +product: App\Entity\Product\Product {#95745
    #id: 10851
    #code: "IEEE00005179"
    #attributes: Doctrine\ORM\PersistentCollection {#95727 …}
    #variants: Doctrine\ORM\PersistentCollection {#95724 …}
    #options: Doctrine\ORM\PersistentCollection {#95720 …}
    #associations: Doctrine\ORM\PersistentCollection {#95722 …}
    #createdAt: DateTime @1751039323 {#95753
      date: 2025-06-27 17:48:43.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754608190 {#95732
      date: 2025-08-08 01:09:50.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#95738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#95773
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#95745}
        #id: 38413
        #name: "IEEE 1076:2019"
        #slug: "ieee-1076-2019-ieee00005179-242503"
        #description: """
          Revision Standard - Active.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          This standard defines the syntax and semantics of the VHSIC Hardware Description Language (VHDL). The acronym VHSIC (Very High Speed Integrated Circuits) in the language’s name comes from the U.S. government program that funded early work on the standard.<br />\n
          VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Since it is both machine and human readable, it supports the design, development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. This document is intended for the implementers of tools supporting the language and for advanced users of the language.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard for VHDL Language Reference Manual"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#95736 …}
    #channels: Doctrine\ORM\PersistentCollection {#95729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#95734 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#95731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#95746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#95716
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1636326000 {#95752
      date: 2021-11-08 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1577055600 {#95751
      date: 2019-12-23 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 673
    -documents: Doctrine\ORM\PersistentCollection {#95742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#95740 …}
  }
  +appearance: "state-active"
  +labels: [
    "Active"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#95745
    #id: 10851
    #code: "IEEE00005179"
    #attributes: Doctrine\ORM\PersistentCollection {#95727 …}
    #variants: Doctrine\ORM\PersistentCollection {#95724 …}
    #options: Doctrine\ORM\PersistentCollection {#95720 …}
    #associations: Doctrine\ORM\PersistentCollection {#95722 …}
    #createdAt: DateTime @1751039323 {#95753
      date: 2025-06-27 17:48:43.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754608190 {#95732
      date: 2025-08-08 01:09:50.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#95738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#95773
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#95745}
        #id: 38413
        #name: "IEEE 1076:2019"
        #slug: "ieee-1076-2019-ieee00005179-242503"
        #description: """
          Revision Standard - Active.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          This standard defines the syntax and semantics of the VHSIC Hardware Description Language (VHDL). The acronym VHSIC (Very High Speed Integrated Circuits) in the language’s name comes from the U.S. government program that funded early work on the standard.<br />\n
          VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Since it is both machine and human readable, it supports the design, development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. This document is intended for the implementers of tools supporting the language and for advanced users of the language.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard for VHDL Language Reference Manual"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#95736 …}
    #channels: Doctrine\ORM\PersistentCollection {#95729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#95734 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#95731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#95746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#95716
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1636326000 {#95752
      date: 2021-11-08 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1577055600 {#95751
      date: 2019-12-23 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 673
    -documents: Doctrine\ORM\PersistentCollection {#95742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#95740 …}
  }
]

App\Twig\Components\ProductMostRecent {#115705
  +product: App\Entity\Product\Product {#95745
    #id: 10851
    #code: "IEEE00005179"
    #attributes: Doctrine\ORM\PersistentCollection {#95727 …}
    #variants: Doctrine\ORM\PersistentCollection {#95724 …}
    #options: Doctrine\ORM\PersistentCollection {#95720 …}
    #associations: Doctrine\ORM\PersistentCollection {#95722 …}
    #createdAt: DateTime @1751039323 {#95753
      date: 2025-06-27 17:48:43.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754608190 {#95732
      date: 2025-08-08 01:09:50.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#95738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#95773
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#95745}
        #id: 38413
        #name: "IEEE 1076:2019"
        #slug: "ieee-1076-2019-ieee00005179-242503"
        #description: """
          Revision Standard - Active.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          This standard defines the syntax and semantics of the VHSIC Hardware Description Language (VHDL). The acronym VHSIC (Very High Speed Integrated Circuits) in the language’s name comes from the U.S. government program that funded early work on the standard.<br />\n
          VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Since it is both machine and human readable, it supports the design, development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. This document is intended for the implementers of tools supporting the language and for advanced users of the language.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard for VHDL Language Reference Manual"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#95736 …}
    #channels: Doctrine\ORM\PersistentCollection {#95729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#95734 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#95731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#95746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#95716
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1636326000 {#95752
      date: 2021-11-08 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1577055600 {#95751
      date: 2019-12-23 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 673
    -documents: Doctrine\ORM\PersistentCollection {#95742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#95740 …}
  }
  +label: "Most Recent"
  +icon: "check-xs"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#115770
  +product: App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  +appearance: "state-suspended"
  +labels: [
    "Superseded"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
]

App\Twig\Components\ProductMostRecent {#115797
  +product: App\Entity\Product\Product {#7520
    #id: 10114
    #code: "IEEE00003666"
    #attributes: Doctrine\ORM\PersistentCollection {#8207 …}
    #variants: Doctrine\ORM\PersistentCollection {#8289 …}
    #options: Doctrine\ORM\PersistentCollection {#8628 …}
    #associations: Doctrine\ORM\PersistentCollection {#8585 …}
    #createdAt: DateTime @1751038826 {#7536
      date: 2025-06-27 17:40:26.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7535
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#8627 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#8612
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7520}
        #id: 35465
        #name: "IEEE 1076:2008"
        #slug: "ieee-1076-2008-ieee00003666-241766"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)<br />\n
          \t\t\t\t<br />\n
          This standard revises and enhances the VHDL language reference manual (LRM) by including a standard C language interface specification; specifications from previously separate, but related, standards IEEE Std 1164 -1993,1 IEEE Std 1076.2 -1996, and IEEE Std 1076.3-1997; and general language enhancements in the areas of design and verification of electronic systems.<br />\n
          The VHDL language was defined for use in the design and documentation of electronics systems. It is revised to incorporate capabilities that improve the language's usefulness for its intended purpose as well as extend it to address design verification methodologies that have developed in industry. These new design and verification capabilities are required to ensure VHDL remains relevant and valuable for use in electronic systems design and verification. Incorporation of previously separate, but related standards, simplifies the maintenance of the specifications.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7943 …}
    #channels: Doctrine\ORM\PersistentCollection {#8104 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#8066 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#8118 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7746 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7530
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1613602800 {#7496
      date: 2021-02-18 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1232924400 {#7531
      date: 2009-01-26 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 640
    -documents: Doctrine\ORM\PersistentCollection {#7786 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7928 …}
  }
  +label: "Historical"
  +icon: "historical"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#115443
    #id: 10221
    #code: "IEEE00003932"
    #attributes: Doctrine\ORM\PersistentCollection {#115459 …}
    #variants: Doctrine\ORM\PersistentCollection {#115461 …}
    #options: Doctrine\ORM\PersistentCollection {#115465 …}
    #associations: Doctrine\ORM\PersistentCollection {#115463 …}
    #createdAt: DateTime @1751038907 {#115435
      date: 2025-06-27 17:41:47.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115432
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115449 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#115863
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115443}
        #id: 35893
        #name: "IEEE 1076c:2007"
        #slug: "ieee-1076c-2007-ieee00003932-241873"
        #description: """
          Amendment Standard - Superseded.<br />\n
          This amendment adds a simulation runtime application interface (VHDL Programming Interface or VHPI) to the existing base standard IEEE Std 1076-2002<br />\n
          \t\t\t\t<br />\n
          The scope of the proposed project is to amend the existing IEEE 1076-2002 (VHDL) standard by adding a simulation runtime application interface (VHDL Programming Interface or VHPI).<br />\n
          The VHPI will enhance the market for VHDL-related simulation tools by defining a standard interface between VHDL simulators and additional modeling, analysis and debugging tools.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual - Procedural Language Application Interface"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115451 …}
    #channels: Doctrine\ORM\PersistentCollection {#115457 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115453 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115455 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115442 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115434
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1692136800 {#115436
      date: 2023-08-16 00:00:00.0 Europe/Paris (+02:00)
    }
    -author: ""
    -publishedAt: DateTime @1188943200 {#115437
      date: 2007-09-05 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 212
    -documents: Doctrine\ORM\PersistentCollection {#115445 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115447 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#115878
  +product: App\Entity\Product\Product {#115443
    #id: 10221
    #code: "IEEE00003932"
    #attributes: Doctrine\ORM\PersistentCollection {#115459 …}
    #variants: Doctrine\ORM\PersistentCollection {#115461 …}
    #options: Doctrine\ORM\PersistentCollection {#115465 …}
    #associations: Doctrine\ORM\PersistentCollection {#115463 …}
    #createdAt: DateTime @1751038907 {#115435
      date: 2025-06-27 17:41:47.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115432
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115449 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#115863
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115443}
        #id: 35893
        #name: "IEEE 1076c:2007"
        #slug: "ieee-1076c-2007-ieee00003932-241873"
        #description: """
          Amendment Standard - Superseded.<br />\n
          This amendment adds a simulation runtime application interface (VHDL Programming Interface or VHPI) to the existing base standard IEEE Std 1076-2002<br />\n
          \t\t\t\t<br />\n
          The scope of the proposed project is to amend the existing IEEE 1076-2002 (VHDL) standard by adding a simulation runtime application interface (VHDL Programming Interface or VHPI).<br />\n
          The VHPI will enhance the market for VHDL-related simulation tools by defining a standard interface between VHDL simulators and additional modeling, analysis and debugging tools.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual - Procedural Language Application Interface"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115451 …}
    #channels: Doctrine\ORM\PersistentCollection {#115457 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115453 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115455 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115442 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115434
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1692136800 {#115436
      date: 2023-08-16 00:00:00.0 Europe/Paris (+02:00)
    }
    -author: ""
    -publishedAt: DateTime @1188943200 {#115437
      date: 2007-09-05 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 212
    -documents: Doctrine\ORM\PersistentCollection {#115445 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115447 …}
  }
  +appearance: "state-suspended"
  +labels: [
    "Superseded"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#115443
    #id: 10221
    #code: "IEEE00003932"
    #attributes: Doctrine\ORM\PersistentCollection {#115459 …}
    #variants: Doctrine\ORM\PersistentCollection {#115461 …}
    #options: Doctrine\ORM\PersistentCollection {#115465 …}
    #associations: Doctrine\ORM\PersistentCollection {#115463 …}
    #createdAt: DateTime @1751038907 {#115435
      date: 2025-06-27 17:41:47.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115432
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115449 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#115863
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115443}
        #id: 35893
        #name: "IEEE 1076c:2007"
        #slug: "ieee-1076c-2007-ieee00003932-241873"
        #description: """
          Amendment Standard - Superseded.<br />\n
          This amendment adds a simulation runtime application interface (VHDL Programming Interface or VHPI) to the existing base standard IEEE Std 1076-2002<br />\n
          \t\t\t\t<br />\n
          The scope of the proposed project is to amend the existing IEEE 1076-2002 (VHDL) standard by adding a simulation runtime application interface (VHDL Programming Interface or VHPI).<br />\n
          The VHPI will enhance the market for VHDL-related simulation tools by defining a standard interface between VHDL simulators and additional modeling, analysis and debugging tools.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual - Procedural Language Application Interface"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115451 …}
    #channels: Doctrine\ORM\PersistentCollection {#115457 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115453 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115455 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115442 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115434
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1692136800 {#115436
      date: 2023-08-16 00:00:00.0 Europe/Paris (+02:00)
    }
    -author: ""
    -publishedAt: DateTime @1188943200 {#115437
      date: 2007-09-05 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 212
    -documents: Doctrine\ORM\PersistentCollection {#115445 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115447 …}
  }
]

App\Twig\Components\ProductMostRecent {#115930
  +product: App\Entity\Product\Product {#115443
    #id: 10221
    #code: "IEEE00003932"
    #attributes: Doctrine\ORM\PersistentCollection {#115459 …}
    #variants: Doctrine\ORM\PersistentCollection {#115461 …}
    #options: Doctrine\ORM\PersistentCollection {#115465 …}
    #associations: Doctrine\ORM\PersistentCollection {#115463 …}
    #createdAt: DateTime @1751038907 {#115435
      date: 2025-06-27 17:41:47.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115432
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115449 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#115863
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115443}
        #id: 35893
        #name: "IEEE 1076c:2007"
        #slug: "ieee-1076c-2007-ieee00003932-241873"
        #description: """
          Amendment Standard - Superseded.<br />\n
          This amendment adds a simulation runtime application interface (VHDL Programming Interface or VHPI) to the existing base standard IEEE Std 1076-2002<br />\n
          \t\t\t\t<br />\n
          The scope of the proposed project is to amend the existing IEEE 1076-2002 (VHDL) standard by adding a simulation runtime application interface (VHDL Programming Interface or VHPI).<br />\n
          The VHPI will enhance the market for VHDL-related simulation tools by defining a standard interface between VHDL simulators and additional modeling, analysis and debugging tools.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual - Procedural Language Application Interface"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115451 …}
    #channels: Doctrine\ORM\PersistentCollection {#115457 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115453 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115455 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115442 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115434
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1692136800 {#115436
      date: 2023-08-16 00:00:00.0 Europe/Paris (+02:00)
    }
    -author: ""
    -publishedAt: DateTime @1188943200 {#115437
      date: 2007-09-05 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 212
    -documents: Doctrine\ORM\PersistentCollection {#115445 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115447 …}
  }
  +label: "Historical"
  +icon: "historical"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#115994
  +product: App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
  +appearance: "state-suspended"
  +labels: [
    "Superseded"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
]

App\Twig\Components\ProductMostRecent {#116021
  +product: App\Entity\Product\Product {#108744
    #id: 9094
    #code: "IEEE00001612"
    #attributes: Doctrine\ORM\PersistentCollection {#108727 …}
    #variants: Doctrine\ORM\PersistentCollection {#108724 …}
    #options: Doctrine\ORM\PersistentCollection {#108720 …}
    #associations: Doctrine\ORM\PersistentCollection {#108722 …}
    #createdAt: DateTime @1751037966 {#108752
      date: 2025-06-27 17:26:06.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754606304 {#108725
      date: 2025-08-08 00:38:24.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#108738 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#108777
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#108744}
        #id: 31385
        #name: "IEEE 1076:2002"
        #slug: "ieee-1076-2002-ieee00001612-240746"
        #description: """
          Revision Standard - Superseded.<br />\n
          Replaced by 61691-1-1 Dual-logo document. Revision of the IEEE Std 1076, 2000 Edition Abstract: VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Develop a standard computer language and environment for use in the design and description of electronic systems from the abstract to logical gate modeling levels.<br />\n
          To provide a syntax, vocabulary and semantics for describing electronic systems. The data is required to support the design, production and maintenance of electronic systems throughout their life cycle.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#108735 …}
    #channels: Doctrine\ORM\PersistentCollection {#108729 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#108733 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#108731 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#108745 …}
    -apiLastModifiedAt: DateTime @1754517600 {#108712
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#108751
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1021586400 {#108750
      date: 2002-05-17 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 308
    -documents: Doctrine\ORM\PersistentCollection {#108742 …}
    -favorites: Doctrine\ORM\PersistentCollection {#108740 …}
  }
  +label: "Historical"
  +icon: "historical"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#115472
    #id: 9101
    #code: "IEEE00001621"
    #attributes: Doctrine\ORM\PersistentCollection {#115489 …}
    #variants: Doctrine\ORM\PersistentCollection {#115491 …}
    #options: Doctrine\ORM\PersistentCollection {#115495 …}
    #associations: Doctrine\ORM\PersistentCollection {#115493 …}
    #createdAt: DateTime @1751037971 {#115469
      date: 2025-06-27 17:26:11.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115468
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115479 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116087
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115472}
        #id: 31413
        #name: "IEEE 1076:2000"
        #slug: "ieee-1076-2000-ieee00001621-240753"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notationintended for use in all phases of the creation of electronic systems. Because it is both machine read-able and human readable, it supports the development, verification, synthesis, and testing of hard-ware designs; the communication of hardware design data; and the maintenance, modification, andprocurement of hardware. Its primary audiences are the implementors of tools supporting the lan-guage and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Add mutual exclusion semantics to the shared variable feature in VHDL.<br />\n
          To address a language feature area that received a significant share of negative ballots and positive ballots with comments on the implementation during the successful VHDL 1076-1993 balloting. The working group was formed to attempt to reach concensus on a better implementation of the language feature.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115481 …}
    #channels: Doctrine\ORM\PersistentCollection {#115487 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115483 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115485 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115473 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115467
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115425
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @978044400 {#115428
      date: 2000-12-29 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 300
    -documents: Doctrine\ORM\PersistentCollection {#115475 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115477 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#116102
  +product: App\Entity\Product\Product {#115472
    #id: 9101
    #code: "IEEE00001621"
    #attributes: Doctrine\ORM\PersistentCollection {#115489 …}
    #variants: Doctrine\ORM\PersistentCollection {#115491 …}
    #options: Doctrine\ORM\PersistentCollection {#115495 …}
    #associations: Doctrine\ORM\PersistentCollection {#115493 …}
    #createdAt: DateTime @1751037971 {#115469
      date: 2025-06-27 17:26:11.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115468
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115479 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116087
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115472}
        #id: 31413
        #name: "IEEE 1076:2000"
        #slug: "ieee-1076-2000-ieee00001621-240753"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notationintended for use in all phases of the creation of electronic systems. Because it is both machine read-able and human readable, it supports the development, verification, synthesis, and testing of hard-ware designs; the communication of hardware design data; and the maintenance, modification, andprocurement of hardware. Its primary audiences are the implementors of tools supporting the lan-guage and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Add mutual exclusion semantics to the shared variable feature in VHDL.<br />\n
          To address a language feature area that received a significant share of negative ballots and positive ballots with comments on the implementation during the successful VHDL 1076-1993 balloting. The working group was formed to attempt to reach concensus on a better implementation of the language feature.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115481 …}
    #channels: Doctrine\ORM\PersistentCollection {#115487 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115483 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115485 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115473 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115467
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115425
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @978044400 {#115428
      date: 2000-12-29 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 300
    -documents: Doctrine\ORM\PersistentCollection {#115475 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115477 …}
  }
  +appearance: "state-suspended"
  +labels: [
    "Superseded"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#115472
    #id: 9101
    #code: "IEEE00001621"
    #attributes: Doctrine\ORM\PersistentCollection {#115489 …}
    #variants: Doctrine\ORM\PersistentCollection {#115491 …}
    #options: Doctrine\ORM\PersistentCollection {#115495 …}
    #associations: Doctrine\ORM\PersistentCollection {#115493 …}
    #createdAt: DateTime @1751037971 {#115469
      date: 2025-06-27 17:26:11.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115468
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115479 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116087
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115472}
        #id: 31413
        #name: "IEEE 1076:2000"
        #slug: "ieee-1076-2000-ieee00001621-240753"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notationintended for use in all phases of the creation of electronic systems. Because it is both machine read-able and human readable, it supports the development, verification, synthesis, and testing of hard-ware designs; the communication of hardware design data; and the maintenance, modification, andprocurement of hardware. Its primary audiences are the implementors of tools supporting the lan-guage and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Add mutual exclusion semantics to the shared variable feature in VHDL.<br />\n
          To address a language feature area that received a significant share of negative ballots and positive ballots with comments on the implementation during the successful VHDL 1076-1993 balloting. The working group was formed to attempt to reach concensus on a better implementation of the language feature.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115481 …}
    #channels: Doctrine\ORM\PersistentCollection {#115487 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115483 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115485 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115473 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115467
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115425
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @978044400 {#115428
      date: 2000-12-29 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 300
    -documents: Doctrine\ORM\PersistentCollection {#115475 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115477 …}
  }
]

App\Twig\Components\ProductMostRecent {#116154
  +product: App\Entity\Product\Product {#115472
    #id: 9101
    #code: "IEEE00001621"
    #attributes: Doctrine\ORM\PersistentCollection {#115489 …}
    #variants: Doctrine\ORM\PersistentCollection {#115491 …}
    #options: Doctrine\ORM\PersistentCollection {#115495 …}
    #associations: Doctrine\ORM\PersistentCollection {#115493 …}
    #createdAt: DateTime @1751037971 {#115469
      date: 2025-06-27 17:26:11.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607004 {#115468
      date: 2025-08-08 00:50:04.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115479 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116087
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115472}
        #id: 31413
        #name: "IEEE 1076:2000"
        #slug: "ieee-1076-2000-ieee00001621-240753"
        #description: """
          Revision Standard - Superseded.<br />\n
          VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notationintended for use in all phases of the creation of electronic systems. Because it is both machine read-able and human readable, it supports the development, verification, synthesis, and testing of hard-ware designs; the communication of hardware design data; and the maintenance, modification, andprocurement of hardware. Its primary audiences are the implementors of tools supporting the lan-guage and the advanced users of the language.<br />\n
          \t\t\t\t<br />\n
          Add mutual exclusion semantics to the shared variable feature in VHDL.<br />\n
          To address a language feature area that received a significant share of negative ballots and positive ballots with comments on the implementation during the successful VHDL 1076-1993 balloting. The working group was formed to attempt to reach concensus on a better implementation of the language feature.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115481 …}
    #channels: Doctrine\ORM\PersistentCollection {#115487 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115483 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115485 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115473 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115467
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115425
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @978044400 {#115428
      date: 2000-12-29 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 300
    -documents: Doctrine\ORM\PersistentCollection {#115475 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115477 …}
  }
  +label: "Historical"
  +icon: "historical"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#115502
    #id: 9093
    #code: "IEEE00001611"
    #attributes: Doctrine\ORM\PersistentCollection {#115519 …}
    #variants: Doctrine\ORM\PersistentCollection {#115521 …}
    #options: Doctrine\ORM\PersistentCollection {#115525 …}
    #associations: Doctrine\ORM\PersistentCollection {#115523 …}
    #createdAt: DateTime @1751037965 {#115497
      date: 2025-06-27 17:26:05.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#115498
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115509 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116220
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115502}
        #id: 31381
        #name: "IEEE 1076:1993"
        #slug: "ieee-1076-1993-ieee00001611-240745"
        #description: """
          Revision Standard - Superseded.<br />\n
          Aiding in the comprehension and use of IEEE VHDL, this unique product offers a comprehensive &amp; reliable tutorial on VHDL - not available anywhere else. An enhancement to IEEE Std 1076-1993, the interactive tutorial is organized into four modules designed to incrementally add to the user's understanding of VHDL and it's applications. This hands-on tutorial shows clear links between the many levels and layers of VHDL and provides actual examples of VHDL implementation, making it an indispensible tool for VHDL product development and users.<br />\n
          \t\t\t\t<br />\n
          The intent of this standard is to define VHDL accurately. Its primary audiences are the implementor of tools 5 supporting the language and the advanced user of the language. Other users are encouraged to use commercially available books, tutorials, and classes to learn the language in some detail prior to reading this manual. These resources generally focus on how to use the language, rather than how a VHDL-compliant tool is required to behave.<br />\n
          At the time of its publication, this document was the authoritative definition of VHDL. From time to time, it may become necessary to correct and/or clarify portions of this standard. Such corrections and clarifications may be published in separate documents. Such documents modify this standard at the time of their publication and remain in effect until superseded by subsequent documents or until the standard is officially revised.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115511 …}
    #channels: Doctrine\ORM\PersistentCollection {#115517 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115513 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115515 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115503 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115499
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115500
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @770853600 {#115501
      date: 1994-06-06 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 288
    -documents: Doctrine\ORM\PersistentCollection {#115505 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115507 …}
  }
  "showFullLabel" => "true"
]

[
  "showFullLabel" => "true"
]

App\Twig\Components\ProductState {#116235
  +product: App\Entity\Product\Product {#115502
    #id: 9093
    #code: "IEEE00001611"
    #attributes: Doctrine\ORM\PersistentCollection {#115519 …}
    #variants: Doctrine\ORM\PersistentCollection {#115521 …}
    #options: Doctrine\ORM\PersistentCollection {#115525 …}
    #associations: Doctrine\ORM\PersistentCollection {#115523 …}
    #createdAt: DateTime @1751037965 {#115497
      date: 2025-06-27 17:26:05.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#115498
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115509 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116220
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115502}
        #id: 31381
        #name: "IEEE 1076:1993"
        #slug: "ieee-1076-1993-ieee00001611-240745"
        #description: """
          Revision Standard - Superseded.<br />\n
          Aiding in the comprehension and use of IEEE VHDL, this unique product offers a comprehensive &amp; reliable tutorial on VHDL - not available anywhere else. An enhancement to IEEE Std 1076-1993, the interactive tutorial is organized into four modules designed to incrementally add to the user's understanding of VHDL and it's applications. This hands-on tutorial shows clear links between the many levels and layers of VHDL and provides actual examples of VHDL implementation, making it an indispensible tool for VHDL product development and users.<br />\n
          \t\t\t\t<br />\n
          The intent of this standard is to define VHDL accurately. Its primary audiences are the implementor of tools 5 supporting the language and the advanced user of the language. Other users are encouraged to use commercially available books, tutorials, and classes to learn the language in some detail prior to reading this manual. These resources generally focus on how to use the language, rather than how a VHDL-compliant tool is required to behave.<br />\n
          At the time of its publication, this document was the authoritative definition of VHDL. From time to time, it may become necessary to correct and/or clarify portions of this standard. Such corrections and clarifications may be published in separate documents. Such documents modify this standard at the time of their publication and remain in effect until superseded by subsequent documents or until the standard is officially revised.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115511 …}
    #channels: Doctrine\ORM\PersistentCollection {#115517 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115513 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115515 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115503 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115499
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115500
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @770853600 {#115501
      date: 1994-06-06 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 288
    -documents: Doctrine\ORM\PersistentCollection {#115505 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115507 …}
  }
  +appearance: "state-suspended"
  +labels: [
    "Superseded"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}

[
  "product" => App\Entity\Product\Product {#115502
    #id: 9093
    #code: "IEEE00001611"
    #attributes: Doctrine\ORM\PersistentCollection {#115519 …}
    #variants: Doctrine\ORM\PersistentCollection {#115521 …}
    #options: Doctrine\ORM\PersistentCollection {#115525 …}
    #associations: Doctrine\ORM\PersistentCollection {#115523 …}
    #createdAt: DateTime @1751037965 {#115497
      date: 2025-06-27 17:26:05.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#115498
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115509 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116220
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115502}
        #id: 31381
        #name: "IEEE 1076:1993"
        #slug: "ieee-1076-1993-ieee00001611-240745"
        #description: """
          Revision Standard - Superseded.<br />\n
          Aiding in the comprehension and use of IEEE VHDL, this unique product offers a comprehensive &amp; reliable tutorial on VHDL - not available anywhere else. An enhancement to IEEE Std 1076-1993, the interactive tutorial is organized into four modules designed to incrementally add to the user's understanding of VHDL and it's applications. This hands-on tutorial shows clear links between the many levels and layers of VHDL and provides actual examples of VHDL implementation, making it an indispensible tool for VHDL product development and users.<br />\n
          \t\t\t\t<br />\n
          The intent of this standard is to define VHDL accurately. Its primary audiences are the implementor of tools 5 supporting the language and the advanced user of the language. Other users are encouraged to use commercially available books, tutorials, and classes to learn the language in some detail prior to reading this manual. These resources generally focus on how to use the language, rather than how a VHDL-compliant tool is required to behave.<br />\n
          At the time of its publication, this document was the authoritative definition of VHDL. From time to time, it may become necessary to correct and/or clarify portions of this standard. Such corrections and clarifications may be published in separate documents. Such documents modify this standard at the time of their publication and remain in effect until superseded by subsequent documents or until the standard is officially revised.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115511 …}
    #channels: Doctrine\ORM\PersistentCollection {#115517 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115513 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115515 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115503 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115499
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115500
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @770853600 {#115501
      date: 1994-06-06 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 288
    -documents: Doctrine\ORM\PersistentCollection {#115505 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115507 …}
  }
]

App\Twig\Components\ProductMostRecent {#116287
  +product: App\Entity\Product\Product {#115502
    #id: 9093
    #code: "IEEE00001611"
    #attributes: Doctrine\ORM\PersistentCollection {#115519 …}
    #variants: Doctrine\ORM\PersistentCollection {#115521 …}
    #options: Doctrine\ORM\PersistentCollection {#115525 …}
    #associations: Doctrine\ORM\PersistentCollection {#115523 …}
    #createdAt: DateTime @1751037965 {#115497
      date: 2025-06-27 17:26:05.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#115498
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#115509 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#116220
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#115502}
        #id: 31381
        #name: "IEEE 1076:1993"
        #slug: "ieee-1076-1993-ieee00001611-240745"
        #description: """
          Revision Standard - Superseded.<br />\n
          Aiding in the comprehension and use of IEEE VHDL, this unique product offers a comprehensive &amp; reliable tutorial on VHDL - not available anywhere else. An enhancement to IEEE Std 1076-1993, the interactive tutorial is organized into four modules designed to incrementally add to the user's understanding of VHDL and it's applications. This hands-on tutorial shows clear links between the many levels and layers of VHDL and provides actual examples of VHDL implementation, making it an indispensible tool for VHDL product development and users.<br />\n
          \t\t\t\t<br />\n
          The intent of this standard is to define VHDL accurately. Its primary audiences are the implementor of tools 5 supporting the language and the advanced user of the language. Other users are encouraged to use commercially available books, tutorials, and classes to learn the language in some detail prior to reading this manual. These resources generally focus on how to use the language, rather than how a VHDL-compliant tool is required to behave.<br />\n
          At the time of its publication, this document was the authoritative definition of VHDL. From time to time, it may become necessary to correct and/or clarify portions of this standard. Such corrections and clarifications may be published in separate documents. Such documents modify this standard at the time of their publication and remain in effect until superseded by subsequent documents or until the standard is officially revised.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEEE Standard VHDL Language Reference Manual"
        -notes: "Superseded"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#115511 …}
    #channels: Doctrine\ORM\PersistentCollection {#115517 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7519 …}
    #reviews: Doctrine\ORM\PersistentCollection {#115513 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#115515 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7681 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#115503 …}
    -apiLastModifiedAt: DateTime @1754517600 {#115499
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#115500
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @770853600 {#115501
      date: 1994-06-06 00:00:00.0 Europe/Paris (+02:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "1076"
    -bookCollection: ""
    -pageCount: 288
    -documents: Doctrine\ORM\PersistentCollection {#115505 …}
    -favorites: Doctrine\ORM\PersistentCollection {#115507 …}
  }
  +label: "Historical"
  +icon: "historical"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}