GET https://dev.normadoc.fr/_partial/products/10366/associations/11061/sort?fieldSort=%7B%22publishedAt%22%3A%22DESC%22%7D&isSubscriberDashboard=0&template=%40Syliu…

Response
200 OK
IP
216.73.216.2
Profiled on
Token
51d79d

Components

3 Twig Components
5 Render Count
2 ms Render Time
84.0 MiB Memory Usage

Components

Name Metadata Render Count Render Time
ProductState 
"App\Twig\Components\ProductState"
components/ProductState.html.twig 		2 0.57ms
ProductMostRecent 
"App\Twig\Components\ProductMostRecent"
components/ProductMostRecent.html.twig 		2 1.48ms
ProductType 
"App\Twig\Components\ProductType"
components/ProductType.html.twig 		1 0.22ms

Render calls

ProductState App\Twig\Components\ProductState 84.0 MiB 0.30 ms
Input props 
[
  "product" => App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
  "showFullLabel" => "true"
]
Attributes 
[
  "showFullLabel" => "true"
]
Component 
App\Twig\Components\ProductState {#93007
  +product: App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
  +appearance: "state-active"
  +labels: [
    "Active"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}
ProductType App\Twig\Components\ProductType 84.0 MiB 0.22 ms
Input props 
[
  "product" => App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
]
Attributes 
[]
Component 
App\Twig\Components\ProductType {#93187
  +product: App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
  +label: "Standard"
  -typeAttributeCode: "type"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}
ProductMostRecent App\Twig\Components\ProductMostRecent 84.0 MiB 0.65 ms
Input props 
[
  "product" => App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
]
Attributes 
[]
Component 
App\Twig\Components\ProductMostRecent {#93262
  +product: App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
  +label: "Most Recent"
  +icon: "check-xs"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}
ProductState App\Twig\Components\ProductState 84.0 MiB 0.27 ms
Input props 
[
  "product" => App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
  "showFullLabel" => "true"
]
Attributes 
[
  "showFullLabel" => "true"
]
Component 
App\Twig\Components\ProductState {#100201
  +product: App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
  +appearance: "state-active"
  +labels: [
    "Active"
  ]
  -stateAttributeCode: "state"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}
ProductMostRecent App\Twig\Components\ProductMostRecent 84.0 MiB 0.82 ms
Input props 
[
  "product" => App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
]
Attributes 
[]
Component 
App\Twig\Components\ProductMostRecent {#100285
  +product: App\Entity\Product\Product {#7310
    #id: 10366
    #code: "IEEE00004252"
    #attributes: Doctrine\ORM\PersistentCollection {#7700 …}
    #variants: Doctrine\ORM\PersistentCollection {#7743 …}
    #options: Doctrine\ORM\PersistentCollection {#7915 …}
    #associations: Doctrine\ORM\PersistentCollection {#7899 …}
    #createdAt: DateTime @1751039017 {#7274
      date: 2025-06-27 17:43:37.0 Europe/Paris (+02:00)
    }
    #updatedAt: DateTime @1754607611 {#7322
      date: 2025-08-08 01:00:11.0 Europe/Paris (+02:00)
    }
    #enabled: true
    #translations: Doctrine\ORM\PersistentCollection {#7921 …}
    #translationsCache: [
      "en_US" => App\Entity\Product\ProductTranslation {#7920
        #locale: "en_US"
        #translatable: App\Entity\Product\Product {#7310}
        #id: 36473
        #name: "IEEE/IEC 62526:2007"
        #slug: "ieee-iec-62526-2007-ieee00004252-242018"
        #description: """
          New IEEE Standard - Active.<br />\n
          Standard Test Interface Language (STIL) provides an interface between digital test<br />\n
          generation tools and test equipment. Extensions to the test interface language (contained in this<br />\n
          standard) are defined that (1) facilitate the use of the language in the design environment and<br />\n
          (2) facilitate the use of the language for large designs encompassing subdesigns with reusable<br />\n
          patterns.<br />\n
          \t\t\t\t<br />\n
          Structures are defined in STIL to support usage as semiconductor simulation stimulus, including<br />\n
          (1) mapping signal names to equivalent design references, (2) interface between scan and built-in self test<br />\n
          (BIST) and the logic simulation, (3) data types to represent unresolved states in a pattern, (4) parallel or<br />\n
          asynchronous pattern execution on different design blocks, and (5) expression-based conditional execution<br />\n
          of pattern constructs.<br />\n
          Structures are defined in STIL to support the definition of test patterns for sub-blocks of a design4<br />\n
          (i.e., embedded cores) such that these tests can be incorporated into a complete higher level device test.<br />\n
          Structures are defined in STIL to relate fail information from device testing environments back to original<br />\n
          stimulus and design data elements.<br />\n
          4 Syntax in this document that is used in the definition of patterns for sub-blocks is summarized in Annex O.<br />\n
          The STIL language definition is enhanced to support the usage of STIL in the design environment, which<br />\n
          includes extending the execution concept to support STIL as a stimulus language, to allow STIL to be used<br />\n
          as an intermediate form of data, and to allow STIL to capture design information needed to port simulation<br />\n
          data to device test environments.<br />\n
          In addition, define extensions to support the definition of subelement tests and to define the mechanisms to<br />\n
          integrate those tests into a complete device test. This effort is to be performed in conjunction with<br />\n
          IEEE Std 1500TM-2005 [B6] and IEEE P1450.6 [B5], which are defining standards for the definition and<br />\n
          integration of embedded cores.<br />\n
          Finally, define the constructs necessary to correlate test failure information back to the design environment,<br />\n
          to allow debug and diagnosis operations to be performed based on failure information in STIL format.
          """
        #metaKeywords: null
        #metaDescription: null
        #shortDescription: "IEC 62526 Ed. 1 (IEEE Std 1450.1(TM)-2005): Standard for Extensions to Standard Test Interface Language (STIL) for Semiconductor Design Environments"
        -notes: "Active"
      }
    ]
    #currentLocale: "en_US"
    #currentTranslation: null
    #fallbackLocale: "en_US"
    #variantSelectionMethod: "match"
    #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …}
    #channels: Doctrine\ORM\PersistentCollection {#7627 …}
    #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …}
    #reviews: Doctrine\ORM\PersistentCollection {#7612 …}
    #averageRating: 0.0
    #images: Doctrine\ORM\PersistentCollection {#7644 …}
    -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …}
    -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …}
    -apiLastModifiedAt: DateTime @1754517600 {#7317
      date: 2025-08-07 00:00:00.0 Europe/Paris (+02:00)
    }
    -lastUpdatedAt: DateTime @1578006000 {#7292
      date: 2020-01-03 00:00:00.0 Europe/Paris (+01:00)
    }
    -author: ""
    -publishedAt: DateTime @1197154800 {#7318
      date: 2007-12-09 00:00:00.0 Europe/Paris (+01:00)
    }
    -releasedAt: null
    -confirmedAt: null
    -canceledAt: null
    -edition: null
    -coreDocument: "62526"
    -bookCollection: ""
    -pageCount: 128
    -documents: Doctrine\ORM\PersistentCollection {#7464 …}
    -favorites: Doctrine\ORM\PersistentCollection {#7499 …}
  }
  +label: "Most Recent"
  +icon: "check-xs"
  -mostRecentAttributeCode: "most_recent"
  -localeContext: Sylius\Component\Locale\Context\CompositeLocaleContext {#1833 …}
}