Forms
sylius_add_to_cart
Errors
This form has no errors.
Default Data
| Property | Value |
|---|---|
| Model Format | same as normalized format |
| Normalized Format | Sylius\Bundle\OrderBundle\Controller\AddToCartCommand {#113768 -cart: App\Entity\Order\Order {#13330 …} -cartItem: App\Entity\Order\OrderItem {#113756 #id: null #order: null #quantity: 1 #unitPrice: 0 #originalUnitPrice: 0 #total: 0 #immutable: false #units: Doctrine\Common\Collections\ArrayCollection {#113780 …} #unitsTotal: 0 #adjustments: Doctrine\Common\Collections\ArrayCollection {#113781 …} #adjustmentsTotal: 0 #version: 1 #variant: App\Entity\Product\ProductVariant {#8099 #id: 3197 #code: "IEEE00002051PDF" #product: App\Entity\Product\Product {#7310 #id: 9317 #code: "IEEE00002051" #attributes: Doctrine\ORM\PersistentCollection {#7700 …} #variants: Doctrine\ORM\PersistentCollection {#7743 …} #options: Doctrine\ORM\PersistentCollection {#7915 #collection: Doctrine\Common\Collections\ArrayCollection {#7917 …} #initialized: true -snapshot: [ …4] -owner: App\Entity\Product\Product {#7310} -association: [ …21] -em: ContainerHAOxQ06\EntityManagerGhostEbeb667 {#775 …} -backRefFieldName: null -typeClass: Symfony\Component\VarDumper\Caster\CutStub {#261210 …} -isDirty: false } #associations: Doctrine\ORM\PersistentCollection {#7899 …} #createdAt: DateTime @1751038164 {#7274 : 2025-06-27 17:29:24.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1754607004 {#7322 : 2025-08-08 00:50:04.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#7921 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductTranslation {#7920 #locale: "en_US" #translatable: App\Entity\Product\Product {#7310} #id: 32277 #name: "IEEE 1364:1995" #slug: "ieee-1364-1995-ieee00002051-240969" #description: """ New IEEE Standard - Superseded.<br />\n The Verilog Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.<br />\n \t\t\t\t<br />\n The intent of this standard is to serve as a complete specification of the Verilog Hardware Description Language (HDL). This document contains:<br />\n -- The formal syntax and semantics of all Verilog HDL construct; s<br />\n -- Simulation system tasks and functions, such as text output display commands;<br />\n -- Compiler directives, such as text substitution macros and simulation time scaling;<br />\n -- The Programming Language Interface (PLI) binding mechanism;<br />\n -- The formal syntax and semantics of access routines, task/function routines, and Verilog procedural interface routines;<br />\n -- Informative usage examples;<br />\n -- Listings of header Þles for PLI """ #metaKeywords: null #metaDescription: null #shortDescription: "IEEE Standard Hardware Description Language Based on the Verilog(R) Hardware Description Language" -notes: "Superseded" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #variantSelectionMethod: "match" #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …} #channels: Doctrine\ORM\PersistentCollection {#7627 …} #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …} #reviews: Doctrine\ORM\PersistentCollection {#7612 …} #averageRating: 0.0 #images: Doctrine\ORM\PersistentCollection {#7644 …} -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …} -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …} -apiLastModifiedAt: DateTime @1754517600 {#7317 : 2025-08-07 00:00:00.0 Europe/Paris (+02:00) } -lastUpdatedAt: DateTime @1578006000 {#7292 : 2020-01-03 00:00:00.0 Europe/Paris (+01:00) } -author: "" -publishedAt: DateTime @845244000 {#7318 : 1996-10-14 00:00:00.0 Europe/Paris (+02:00) } -releasedAt: null -confirmedAt: null -canceledAt: null -edition: null -coreDocument: "1364" -bookCollection: "" -pageCount: 688 -documents: Doctrine\ORM\PersistentCollection {#7464 …} -favorites: Doctrine\ORM\PersistentCollection {#7499 …} } #optionValues: Doctrine\ORM\PersistentCollection {#8315 …} #position: 0 #createdAt: DateTime @1751041154 {#7283 : 2025-06-27 18:19:14.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1755611970 {#8116 : 2025-08-19 15:59:30.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#8259 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductVariantTranslation {#93321 #locale: "en_US" #translatable: App\Entity\Product\ProductVariant {#8099} #id: 3215 #name: null -shortDescription: null -description: null -notes: null -shippingInformation: "Instant download" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #version: 9 #onHold: 0 #onHand: 0 #tracked: false #weight: 0.0 #width: null #height: null #depth: null #taxCategory: Proxies\__CG__\App\Entity\Taxation\TaxCategory {#8131 …} #shippingCategory: null #channelPricings: Doctrine\ORM\PersistentCollection {#8293 …} #shippingRequired: true #images: Doctrine\ORM\PersistentCollection {#8290 …} -apiLastModifiedAt: DateTime @1753740000 {#8098 : 2025-07-29 00:00:00.0 Europe/Paris (+02:00) } -publishedAt: null -isbn: "978-0-7381-3065-1" -ean: "9780738130651" -numberOfUsers: 1 -physicalProduct: false -downloadableImmediately: true -downloadable: true -drmViewerUrl: "https://online-viewer.normadoc.com/3r9JgW" -sellable: true -documents: Doctrine\ORM\PersistentCollection {#8127 …} -drmTokens: Doctrine\ORM\PersistentCollection {#8119 …} -enabledForSubscribers: true -currentAreaContext: null } #productName: null #variantName: null } } |
| View Format | same as normalized format |
Submitted Data
This form was not submitted.
Passed Options
| Option | Passed Value | Resolved Value |
|---|---|---|
| data | Sylius\Bundle\OrderBundle\Controller\AddToCartCommand {#113768 -cart: App\Entity\Order\Order {#13330 …} -cartItem: App\Entity\Order\OrderItem {#113756 #id: null #order: null #quantity: 1 #unitPrice: 0 #originalUnitPrice: 0 #total: 0 #immutable: false #units: Doctrine\Common\Collections\ArrayCollection {#113780 …} #unitsTotal: 0 #adjustments: Doctrine\Common\Collections\ArrayCollection {#113781 …} #adjustmentsTotal: 0 #version: 1 #variant: App\Entity\Product\ProductVariant {#8099 #id: 3197 #code: "IEEE00002051PDF" #product: App\Entity\Product\Product {#7310 #id: 9317 #code: "IEEE00002051" #attributes: Doctrine\ORM\PersistentCollection {#7700 …} #variants: Doctrine\ORM\PersistentCollection {#7743 …} #options: Doctrine\ORM\PersistentCollection {#7915 #collection: Doctrine\Common\Collections\ArrayCollection {#7917 …} #initialized: true -snapshot: [ …4] -owner: App\Entity\Product\Product {#7310} -association: [ …21] -em: ContainerHAOxQ06\EntityManagerGhostEbeb667 {#775 …} -backRefFieldName: null -typeClass: Symfony\Component\VarDumper\Caster\CutStub {#261210 …} -isDirty: false } #associations: Doctrine\ORM\PersistentCollection {#7899 …} #createdAt: DateTime @1751038164 {#7274 : 2025-06-27 17:29:24.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1754607004 {#7322 : 2025-08-08 00:50:04.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#7921 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductTranslation {#7920 #locale: "en_US" #translatable: App\Entity\Product\Product {#7310} #id: 32277 #name: "IEEE 1364:1995" #slug: "ieee-1364-1995-ieee00002051-240969" #description: """ New IEEE Standard - Superseded.<br />\n The Verilog Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.<br />\n \t\t\t\t<br />\n The intent of this standard is to serve as a complete specification of the Verilog Hardware Description Language (HDL). This document contains:<br />\n -- The formal syntax and semantics of all Verilog HDL construct; s<br />\n -- Simulation system tasks and functions, such as text output display commands;<br />\n -- Compiler directives, such as text substitution macros and simulation time scaling;<br />\n -- The Programming Language Interface (PLI) binding mechanism;<br />\n -- The formal syntax and semantics of access routines, task/function routines, and Verilog procedural interface routines;<br />\n -- Informative usage examples;<br />\n -- Listings of header Þles for PLI """ #metaKeywords: null #metaDescription: null #shortDescription: "IEEE Standard Hardware Description Language Based on the Verilog(R) Hardware Description Language" -notes: "Superseded" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #variantSelectionMethod: "match" #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …} #channels: Doctrine\ORM\PersistentCollection {#7627 …} #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …} #reviews: Doctrine\ORM\PersistentCollection {#7612 …} #averageRating: 0.0 #images: Doctrine\ORM\PersistentCollection {#7644 …} -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …} -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …} -apiLastModifiedAt: DateTime @1754517600 {#7317 : 2025-08-07 00:00:00.0 Europe/Paris (+02:00) } -lastUpdatedAt: DateTime @1578006000 {#7292 : 2020-01-03 00:00:00.0 Europe/Paris (+01:00) } -author: "" -publishedAt: DateTime @845244000 {#7318 : 1996-10-14 00:00:00.0 Europe/Paris (+02:00) } -releasedAt: null -confirmedAt: null -canceledAt: null -edition: null -coreDocument: "1364" -bookCollection: "" -pageCount: 688 -documents: Doctrine\ORM\PersistentCollection {#7464 …} -favorites: Doctrine\ORM\PersistentCollection {#7499 …} } #optionValues: Doctrine\ORM\PersistentCollection {#8315 …} #position: 0 #createdAt: DateTime @1751041154 {#7283 : 2025-06-27 18:19:14.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1755611970 {#8116 : 2025-08-19 15:59:30.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#8259 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductVariantTranslation {#93321 #locale: "en_US" #translatable: App\Entity\Product\ProductVariant {#8099} #id: 3215 #name: null -shortDescription: null -description: null -notes: null -shippingInformation: "Instant download" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #version: 9 #onHold: 0 #onHand: 0 #tracked: false #weight: 0.0 #width: null #height: null #depth: null #taxCategory: Proxies\__CG__\App\Entity\Taxation\TaxCategory {#8131 …} #shippingCategory: null #channelPricings: Doctrine\ORM\PersistentCollection {#8293 …} #shippingRequired: true #images: Doctrine\ORM\PersistentCollection {#8290 …} -apiLastModifiedAt: DateTime @1753740000 {#8098 : 2025-07-29 00:00:00.0 Europe/Paris (+02:00) } -publishedAt: null -isbn: "978-0-7381-3065-1" -ean: "9780738130651" -numberOfUsers: 1 -physicalProduct: false -downloadableImmediately: true -downloadable: true -drmViewerUrl: "https://online-viewer.normadoc.com/3r9JgW" -sellable: true -documents: Doctrine\ORM\PersistentCollection {#8127 …} -drmTokens: Doctrine\ORM\PersistentCollection {#8119 …} -enabledForSubscribers: true -currentAreaContext: null } #productName: null #variantName: null } } |
same as passed value |
| product | App\Entity\Product\Product {#7310 #id: 9317 #code: "IEEE00002051" #attributes: Doctrine\ORM\PersistentCollection {#7700 …} #variants: Doctrine\ORM\PersistentCollection {#7743 …} #options: Doctrine\ORM\PersistentCollection {#7915 #collection: Doctrine\Common\Collections\ArrayCollection {#7917 …} #initialized: true -snapshot: [ …4] -owner: App\Entity\Product\Product {#7310} -association: [ …21] -em: ContainerHAOxQ06\EntityManagerGhostEbeb667 {#775 …} -backRefFieldName: null -typeClass: Symfony\Component\VarDumper\Caster\CutStub {#261210 …} -isDirty: false } #associations: Doctrine\ORM\PersistentCollection {#7899 …} #createdAt: DateTime @1751038164 {#7274 : 2025-06-27 17:29:24.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1754607004 {#7322 : 2025-08-08 00:50:04.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#7921 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductTranslation {#7920 #locale: "en_US" #translatable: App\Entity\Product\Product {#7310} #id: 32277 #name: "IEEE 1364:1995" #slug: "ieee-1364-1995-ieee00002051-240969" #description: """ New IEEE Standard - Superseded.<br />\n The Verilog Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.<br />\n \t\t\t\t<br />\n The intent of this standard is to serve as a complete specification of the Verilog Hardware Description Language (HDL). This document contains:<br />\n -- The formal syntax and semantics of all Verilog HDL construct; s<br />\n -- Simulation system tasks and functions, such as text output display commands;<br />\n -- Compiler directives, such as text substitution macros and simulation time scaling;<br />\n -- The Programming Language Interface (PLI) binding mechanism;<br />\n -- The formal syntax and semantics of access routines, task/function routines, and Verilog procedural interface routines;<br />\n -- Informative usage examples;<br />\n -- Listings of header Þles for PLI """ #metaKeywords: null #metaDescription: null #shortDescription: "IEEE Standard Hardware Description Language Based on the Verilog(R) Hardware Description Language" -notes: "Superseded" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #variantSelectionMethod: "match" #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …} #channels: Doctrine\ORM\PersistentCollection {#7627 …} #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …} #reviews: Doctrine\ORM\PersistentCollection {#7612 …} #averageRating: 0.0 #images: Doctrine\ORM\PersistentCollection {#7644 …} -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …} -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …} -apiLastModifiedAt: DateTime @1754517600 {#7317 : 2025-08-07 00:00:00.0 Europe/Paris (+02:00) } -lastUpdatedAt: DateTime @1578006000 {#7292 : 2020-01-03 00:00:00.0 Europe/Paris (+01:00) } -author: "" -publishedAt: DateTime @845244000 {#7318 : 1996-10-14 00:00:00.0 Europe/Paris (+02:00) } -releasedAt: null -confirmedAt: null -canceledAt: null -edition: null -coreDocument: "1364" -bookCollection: "" -pageCount: 688 -documents: Doctrine\ORM\PersistentCollection {#7464 …} -favorites: Doctrine\ORM\PersistentCollection {#7499 …} } |
same as passed value |
Resolved Options
| Option | Value |
|---|---|
| action | "" |
| allow_extra_fields | false |
| allow_file_upload | false |
| attr | [] |
| attr_translation_parameters | [] |
| auto_initialize | true |
| block_name | null |
| block_prefix | null |
| by_reference | true |
| compound | true |
| constraints | [] |
| csrf_field_name | "_token" |
| csrf_message | "The CSRF token is invalid. Please try to resubmit the form." |
| csrf_protection | true |
| csrf_token_id | null |
| csrf_token_manager | Symfony\Component\Security\Csrf\CsrfTokenManager {#113788 -generator: Symfony\Component\Security\Csrf\TokenGenerator\UriSafeTokenGenerator {#113789 …} -storage: Symfony\Component\Security\Csrf\TokenStorage\SessionTokenStorage {#113790 …} -namespace: Closure() {#113792 …} } |
| data | Sylius\Bundle\OrderBundle\Controller\AddToCartCommand {#113768 -cart: App\Entity\Order\Order {#13330 …} -cartItem: App\Entity\Order\OrderItem {#113756 #id: null #order: null #quantity: 1 #unitPrice: 0 #originalUnitPrice: 0 #total: 0 #immutable: false #units: Doctrine\Common\Collections\ArrayCollection {#113780 …} #unitsTotal: 0 #adjustments: Doctrine\Common\Collections\ArrayCollection {#113781 …} #adjustmentsTotal: 0 #version: 1 #variant: App\Entity\Product\ProductVariant {#8099 #id: 3197 #code: "IEEE00002051PDF" #product: App\Entity\Product\Product {#7310 #id: 9317 #code: "IEEE00002051" #attributes: Doctrine\ORM\PersistentCollection {#7700 …} #variants: Doctrine\ORM\PersistentCollection {#7743 …} #options: Doctrine\ORM\PersistentCollection {#7915 #collection: Doctrine\Common\Collections\ArrayCollection {#7917 …} #initialized: true -snapshot: [ …4] -owner: App\Entity\Product\Product {#7310} -association: [ …21] -em: ContainerHAOxQ06\EntityManagerGhostEbeb667 {#775 …} -backRefFieldName: null -typeClass: Symfony\Component\VarDumper\Caster\CutStub {#261210 …} -isDirty: false } #associations: Doctrine\ORM\PersistentCollection {#7899 …} #createdAt: DateTime @1751038164 {#7274 : 2025-06-27 17:29:24.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1754607004 {#7322 : 2025-08-08 00:50:04.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#7921 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductTranslation {#7920 #locale: "en_US" #translatable: App\Entity\Product\Product {#7310} #id: 32277 #name: "IEEE 1364:1995" #slug: "ieee-1364-1995-ieee00002051-240969" #description: """ New IEEE Standard - Superseded.<br />\n The Verilog Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.<br />\n \t\t\t\t<br />\n The intent of this standard is to serve as a complete specification of the Verilog Hardware Description Language (HDL). This document contains:<br />\n -- The formal syntax and semantics of all Verilog HDL construct; s<br />\n -- Simulation system tasks and functions, such as text output display commands;<br />\n -- Compiler directives, such as text substitution macros and simulation time scaling;<br />\n -- The Programming Language Interface (PLI) binding mechanism;<br />\n -- The formal syntax and semantics of access routines, task/function routines, and Verilog procedural interface routines;<br />\n -- Informative usage examples;<br />\n -- Listings of header Þles for PLI """ #metaKeywords: null #metaDescription: null #shortDescription: "IEEE Standard Hardware Description Language Based on the Verilog(R) Hardware Description Language" -notes: "Superseded" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #variantSelectionMethod: "match" #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …} #channels: Doctrine\ORM\PersistentCollection {#7627 …} #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …} #reviews: Doctrine\ORM\PersistentCollection {#7612 …} #averageRating: 0.0 #images: Doctrine\ORM\PersistentCollection {#7644 …} -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …} -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …} -apiLastModifiedAt: DateTime @1754517600 {#7317 : 2025-08-07 00:00:00.0 Europe/Paris (+02:00) } -lastUpdatedAt: DateTime @1578006000 {#7292 : 2020-01-03 00:00:00.0 Europe/Paris (+01:00) } -author: "" -publishedAt: DateTime @845244000 {#7318 : 1996-10-14 00:00:00.0 Europe/Paris (+02:00) } -releasedAt: null -confirmedAt: null -canceledAt: null -edition: null -coreDocument: "1364" -bookCollection: "" -pageCount: 688 -documents: Doctrine\ORM\PersistentCollection {#7464 …} -favorites: Doctrine\ORM\PersistentCollection {#7499 …} } #optionValues: Doctrine\ORM\PersistentCollection {#8315 …} #position: 0 #createdAt: DateTime @1751041154 {#7283 : 2025-06-27 18:19:14.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1755611970 {#8116 : 2025-08-19 15:59:30.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#8259 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductVariantTranslation {#93321 #locale: "en_US" #translatable: App\Entity\Product\ProductVariant {#8099} #id: 3215 #name: null -shortDescription: null -description: null -notes: null -shippingInformation: "Instant download" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #version: 9 #onHold: 0 #onHand: 0 #tracked: false #weight: 0.0 #width: null #height: null #depth: null #taxCategory: Proxies\__CG__\App\Entity\Taxation\TaxCategory {#8131 …} #shippingCategory: null #channelPricings: Doctrine\ORM\PersistentCollection {#8293 …} #shippingRequired: true #images: Doctrine\ORM\PersistentCollection {#8290 …} -apiLastModifiedAt: DateTime @1753740000 {#8098 : 2025-07-29 00:00:00.0 Europe/Paris (+02:00) } -publishedAt: null -isbn: "978-0-7381-3065-1" -ean: "9780738130651" -numberOfUsers: 1 -physicalProduct: false -downloadableImmediately: true -downloadable: true -drmViewerUrl: "https://online-viewer.normadoc.com/3r9JgW" -sellable: true -documents: Doctrine\ORM\PersistentCollection {#8127 …} -drmTokens: Doctrine\ORM\PersistentCollection {#8119 …} -enabledForSubscribers: true -currentAreaContext: null } #productName: null #variantName: null } } |
| data_class | "Sylius\Bundle\OrderBundle\Controller\AddToCartCommand" |
| disabled | false |
| empty_data | Closure(FormInterface $form) {#113815 : "Symfony\Component\Form\Extension\Core\Type\FormType" : { : "Sylius\Bundle\OrderBundle\Controller\AddToCartCommand" } } |
| error_bubbling | true |
| error_mapping | [] |
| extra_fields_message | "This form should not contain extra fields." |
| form_attr | false |
| getter | null |
| help | null |
| help_attr | [] |
| help_html | false |
| help_translation_parameters | [] |
| inherit_data | false |
| invalid_message | "This value is not valid." |
| invalid_message_parameters | [] |
| is_empty_callback | null |
| label | null |
| label_attr | [] |
| label_format | null |
| label_html | false |
| label_translation_parameters | [] |
| mapped | true |
| method | "POST" |
| post_max_size_message | "The uploaded file was too large. Please try to upload a smaller file." |
| priority | 0 |
| product | App\Entity\Product\Product {#7310 #id: 9317 #code: "IEEE00002051" #attributes: Doctrine\ORM\PersistentCollection {#7700 …} #variants: Doctrine\ORM\PersistentCollection {#7743 …} #options: Doctrine\ORM\PersistentCollection {#7915 #collection: Doctrine\Common\Collections\ArrayCollection {#7917 …} #initialized: true -snapshot: [ …4] -owner: App\Entity\Product\Product {#7310} -association: [ …21] -em: ContainerHAOxQ06\EntityManagerGhostEbeb667 {#775 …} -backRefFieldName: null -typeClass: Symfony\Component\VarDumper\Caster\CutStub {#261210 …} -isDirty: false } #associations: Doctrine\ORM\PersistentCollection {#7899 …} #createdAt: DateTime @1751038164 {#7274 : 2025-06-27 17:29:24.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1754607004 {#7322 : 2025-08-08 00:50:04.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#7921 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductTranslation {#7920 #locale: "en_US" #translatable: App\Entity\Product\Product {#7310} #id: 32277 #name: "IEEE 1364:1995" #slug: "ieee-1364-1995-ieee00002051-240969" #description: """ New IEEE Standard - Superseded.<br />\n The Verilog Hardware Description Language (HDL) is defined. Verilog HDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. The primary audiences for this standard are the implementors of tools supporting the language and advanced users of the language.<br />\n \t\t\t\t<br />\n The intent of this standard is to serve as a complete specification of the Verilog Hardware Description Language (HDL). This document contains:<br />\n -- The formal syntax and semantics of all Verilog HDL construct; s<br />\n -- Simulation system tasks and functions, such as text output display commands;<br />\n -- Compiler directives, such as text substitution macros and simulation time scaling;<br />\n -- The Programming Language Interface (PLI) binding mechanism;<br />\n -- The formal syntax and semantics of access routines, task/function routines, and Verilog procedural interface routines;<br />\n -- Informative usage examples;<br />\n -- Listings of header Þles for PLI """ #metaKeywords: null #metaDescription: null #shortDescription: "IEEE Standard Hardware Description Language Based on the Verilog(R) Hardware Description Language" -notes: "Superseded" } ] #currentLocale: "en_US" #currentTranslation: null #fallbackLocale: "en_US" #variantSelectionMethod: "match" #productTaxons: Doctrine\ORM\PersistentCollection {#7533 …} #channels: Doctrine\ORM\PersistentCollection {#7627 …} #mainTaxon: Proxies\__CG__\App\Entity\Taxonomy\Taxon {#7311 …} #reviews: Doctrine\ORM\PersistentCollection {#7612 …} #averageRating: 0.0 #images: Doctrine\ORM\PersistentCollection {#7644 …} -supplier: Proxies\__CG__\App\Entity\Supplier\Supplier {#7325 …} -subscriptionCollections: Doctrine\ORM\PersistentCollection {#7389 …} -apiLastModifiedAt: DateTime @1754517600 {#7317 : 2025-08-07 00:00:00.0 Europe/Paris (+02:00) } -lastUpdatedAt: DateTime @1578006000 {#7292 : 2020-01-03 00:00:00.0 Europe/Paris (+01:00) } -author: "" -publishedAt: DateTime @845244000 {#7318 : 1996-10-14 00:00:00.0 Europe/Paris (+02:00) } -releasedAt: null -confirmedAt: null -canceledAt: null -edition: null -coreDocument: "1364" -bookCollection: "" -pageCount: 688 -documents: Doctrine\ORM\PersistentCollection {#7464 …} -favorites: Doctrine\ORM\PersistentCollection {#7499 …} } |
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| form | Symfony\Component\Form\FormView {#113818 …5} |
| full_name | "sylius_add_to_cart" |
| help | null |
| help_attr | [] |
| help_html | false |
| help_translation_parameters | [] |
| id | "sylius_add_to_cart" |
| label | null |
| label_attr | [] |
| label_format | null |
| label_html | false |
| label_translation_parameters | [] |
| method | "POST" |
| multipart | false |
| name | "sylius_add_to_cart" |
| priority | 0 |
| required | true |
| row_attr | [] |
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| translation_domain | null |
| unique_block_prefix | "_sylius_add_to_cart" |
| valid | true |
| value | Sylius\Bundle\OrderBundle\Controller\AddToCartCommand {#113768 -cart: App\Entity\Order\Order {#13330 …} -cartItem: App\Entity\Order\OrderItem {#113756 #id: null #order: null #quantity: 1 #unitPrice: 0 #originalUnitPrice: 0 #total: 0 #immutable: false #units: Doctrine\Common\Collections\ArrayCollection {#113780 …} #unitsTotal: 0 #adjustments: Doctrine\Common\Collections\ArrayCollection {#113781 …} #adjustmentsTotal: 0 #version: 1 #variant: App\Entity\Product\ProductVariant {#8099 #id: 3197 #code: "IEEE00002051PDF" #product: App\Entity\Product\Product {#7310 #id: 9317 #code: "IEEE00002051" #attributes: Doctrine\ORM\PersistentCollection {#7700 …} #variants: Doctrine\ORM\PersistentCollection {#7743 …} #options: Doctrine\ORM\PersistentCollection {#7915 #collection: Doctrine\Common\Collections\ArrayCollection {#7917 …} #initialized: true -snapshot: [ …4] -owner: App\Entity\Product\Product {#7310} -association: [ …21] -em: ContainerHAOxQ06\EntityManagerGhostEbeb667 {#775 …} -backRefFieldName: null -typeClass: Symfony\Component\VarDumper\Caster\CutStub {#261210 …} -isDirty: false } #associations: Doctrine\ORM\PersistentCollection {#7899 …} #createdAt: DateTime @1751038164 {#7274 : 2025-06-27 17:29:24.0 Europe/Paris (+02:00) } #updatedAt: DateTime @1754607004 {#7322 : 2025-08-08 00:50:04.0 Europe/Paris (+02:00) } #enabled: true #translations: Doctrine\ORM\PersistentCollection {#7921 …} #translationsCache: [ "en_US" => App\Entity\Product\ProductTranslation {#7920 #locale: "en_US" #translatable: App\Entity\Product\Product {#7310} #id: 32277 #name: "IEEE 1364:1995" #slug: "ieee-1364-1995-ieee00002051-240969" #description: """ New IEEE Standard - Superseded.<br />\n The Verilog Hardware Description Language (HDL) is defined. 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